Browsing by Subject "Interconnection networks"

Now showing items 1-5 of 5

    • Article  

      A case for chip multiprocessors based on the data-driven multithreading model 

      Trancoso, Pedro; Evripidou, Paraskevas; Stavrou, Kyriakos; Kyriacou, Costas (2006)
      Current high-end microprocessors achieve high performance as a result of adding more features and therefore increasing complexity. This paper makes the case for a Chip-Multiprocessor based on the Data-Driven Multithreading ...
    • Conference Object  

      Comparison of techniques used for mapping parallel algorithms to message-passing multiprocessors 

      Dikaiakos, Marios D.; Steiglitz, Kenneth; Rogers, Anne (IEEE, 1994)
      This paper presents a comparison study of popular clustering and mapping heuristics which are used to map task-flow graphs to message-passing multiprocessors. To this end, we use task-graphs which are representative of ...
    • Conference Object  

      DDM-CMP: Data-driven multithreading on a chip multiprocessor 

      Stavrou, Kyriakos; Evripidou, Paraskevas; Trancoso, Pedro (2005)
      High-end microprocessors achieve their performance as a result of adding more features and therefore increasing their complexity. In this paper we present DDM-CMP, a Chip-Multiprocessor using the Data-Driven Multithreading ...
    • Article  

      Information theoretic modeling and analysis for global interconnects with process variations 

      Denic, S. Z.; Vasic, B.; Charalambous, Charalambos D.; Chen, J.; Wang, J. M. (2011)
      As the CMOS semiconductor technology enters nanometer regime, interconnect processes must be compatible with device roadmaps and meet manufacturing targets at the specified wafer size. The resulting ubiquitous process ...
    • Article  

      Rapid prototyping of the data-driven chip-multiprocessor (D 2-CMP) using FPGAs 

      Tatas, Konstantinos; Kyriacou, Costas; Evripidou, Paraskevas; Trancoso, Pedro; Wong, S. (2008)
      This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronization Unit (TSU) on FPGA, a hardware unit that ...